Commit 24f2b4cb3c for qemu.org

commit 24f2b4cb3c2d1ba2f82c9474eec8671548bbe644
Author: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Date:   Tue Sep 29 21:24:28 2026 +0000

    tests/tcg/mips/include/wrappers_mips64r6.h: use proper types for parameters

    Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Acked-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
    Link: https://lore.kernel.org/qemu-devel/20260929212439.110454-14-pierrick.bouvier@oss.qualcomm.com
    Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>

diff --git a/tests/tcg/mips/include/wrappers_mips64r6.h b/tests/tcg/mips/include/wrappers_mips64r6.h
index f078f534f0..615582968d 100644
--- a/tests/tcg/mips/include/wrappers_mips64r6.h
+++ b/tests/tcg/mips/include/wrappers_mips64r6.h
@@ -26,8 +26,8 @@
 #include <string.h>

 #define DO_MIPS64R6__RD__RS(suffix, mnemonic)                          \
-static inline void do_mips64r6_##suffix(const void *input,             \
-                                        void *output)                  \
+static inline void do_mips64r6_##suffix(const uint64_t *input,         \
+                                        uint64_t *output)              \
 {                                                                      \
    __asm__ volatile (                                                  \
       "ld $t1, 0(%0)\n\t"                                              \
@@ -48,9 +48,9 @@ DO_MIPS64R6__RD__RS(BITSWAP, bitswap)
 DO_MIPS64R6__RD__RS(DBITSWAP, dbitswap)

 #define DO_MIPS64R6__RD__RS_RT(suffix, mnemonic)                       \
-static inline void do_mips64r6_##suffix(const void *input1,            \
-                                        const void *input2,            \
-                                        void *output)                  \
+static inline void do_mips64r6_##suffix(const uint64_t *input1,        \
+                                        const uint64_t *input2,        \
+                                        uint64_t *output)              \
 {                                                                      \
    __asm__ volatile (                                                  \
       "ld $t1, 0(%0)\n\t"                                              \
@@ -86,9 +86,9 @@ DO_MIPS64R6__RD__RS_RT(XOR, xor)


 #define DO_MIPS64R6__RT__RS_RT(suffix, mnemonic)                       \
-static inline void do_mips64r6_##suffix(const void *input1,            \
-                                        const void *input2,            \
-                                        void *output)                  \
+static inline void do_mips64r6_##suffix(const uint64_t *input1,        \
+                                        const uint64_t *input2,        \
+                                        uint64_t *output)              \
 {                                                                      \
     if (strncmp(#mnemonic, "crc32", 5) == 0)                           \
         __asm__ volatile (                                             \