Commit 3102841282 for qemu.org
commit 31028412827b30074780cb47d4309868cb6a9eb1
Author: Harald Freudenberger <freude@linux.ibm.com>
Date: Mon Aug 24 10:31:56 2026 +0200
target/s390x: Support AES XTS for cpacf km instruction
Support the subfunctions XTS-AES-128 and XTS-AES-256
for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-13-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 34e2be3af1..ad99f9ff85 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -932,6 +932,8 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_KM_AES_128,
S390_FEAT_KM_AES_192,
S390_FEAT_KM_AES_256,
+ S390_FEAT_KM_XTS_AES_128,
+ S390_FEAT_KM_XTS_AES_256,
S390_FEAT_KMC_AES_128,
S390_FEAT_KMC_AES_192,
S390_FEAT_KMC_AES_256,
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 4a20aeacde..5013e19907 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -34,5 +34,9 @@ int cpacf_aes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint8_t fc, uint8_t mod);
int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint8_t fc);
+int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
index 6c7b959bd9..f705bd6677 100644
--- a/target/s390x/tcg/cpacf_aes.c
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -361,3 +361,96 @@ int cpacf_aes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
return 0;
}
+
+int cpacf_aes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ uint8_t key[32], tweak[AES_BLOCK_SIZE];
+ int i, keysize, addr_reg_size;
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+
+ switch (fc) {
+ case CPACF_KM_XTS_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_XTS_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* fetch tweak from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, tweak, AES_BLOCK_SIZE);
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ /* fetch one AES block into in */
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ /* decrypt in => out */
+ AES_xts_decrypt(in, out, tweak, &exkey);
+ } else {
+ /* encrypt in => out */
+ AES_xts_encrypt(in, out, tweak, &exkey);
+ }
+ /* prep tweak for next round */
+ AES_xts_prep_next_tweak(tweak);
+ /* write out this processed block from out */
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ /* update tweak in param block */
+ write_guest_wrap_u8(env, mmu_idx, ra,
+ param_addr + keysize, tweak, AES_BLOCK_SIZE);
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index c829d16f74..2bd39f8978 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -112,6 +112,12 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
&env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
S390_FEAT_TYPE_KM, fc, mod);
break;
+ case CPACF_KM_XTS_128:
+ case CPACF_KM_XTS_256:
+ rc = cpacf_aes_xts(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
default:
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}