Commit 3d4151bc7f for qemu.org
commit 3d4151bc7f8152f420a757a468f9bc7095d4be04
Author: Harald Freudenberger <freude@linux.ibm.com>
Date: Mon Aug 24 10:31:52 2026 +0200
target/s390x: Support AES ECB for cpacf km instruction
Support the subfunctions CPACF_KM_AES_128, CPACF_KM_AES_192
and CPACF_KM_AES_256 for the cpacf km instruction.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Tested-by: Holger Dengler <dengler@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-9-freude@linux.ibm.com
[farman@linux.ibm.com: Resolve merge conflict in gen-features.c]
Signed-off-by: Eric Farman <farman@linux.ibm.com>
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index e1d924d04c..d6d4c45434 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -929,6 +929,9 @@ static uint16_t qemu_MAX[] = {
S390_FEAT_CERT_STORE,
S390_FEAT_SIPL,
S390_FEAT_SCLAF,
+ S390_FEAT_KM_AES_128,
+ S390_FEAT_KM_AES_192,
+ S390_FEAT_KM_AES_256,
};
/****** END FEATURE DEFS ******/
diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h
index 67b8368e4d..49630bab5e 100644
--- a/target/s390x/tcg/cpacf.h
+++ b/target/s390x/tcg/cpacf.h
@@ -18,4 +18,10 @@ int cpacf_sha512(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint64_t param_addr, uint64_t *message_reg, uint64_t *len_reg,
uint32_t type);
+/* from cpacf_aes.c */
+int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod);
+
#endif /* S390X_CPACF_H */
diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c
new file mode 100644
index 0000000000..d87da18c19
--- /dev/null
+++ b/target/s390x/tcg/cpacf_aes.c
@@ -0,0 +1,137 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * s390 cpacf aes
+ *
+ * Authors:
+ * Harald Freudenberger <freude@linux.ibm.com>
+ */
+
+#include "qemu/osdep.h"
+#include "s390x-internal.h"
+#include "tcg_s390x.h"
+#include "accel/tcg/cpu-ldst-common.h"
+#include "accel/tcg/cpu-mmu-index.h"
+#include "crypto/aes.h"
+#include "crypto/aes-helpers.h"
+#include "target/s390x/tcg/cpacf-arch.h"
+#include "target/s390x/tcg/cpacf.h"
+#include "target/s390x/tcg/crypto_helper.h"
+
+/*
+ * read exactly one AES block from guest memory into a local buffer
+ */
+static inline void aes_read_block(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint8_t *buf)
+{
+ read_guest_wrap_u8(env, mmu_idx, ra, guest_addr, buf, AES_BLOCK_SIZE);
+}
+
+/*
+ * write exactly one AES block from local buffer to guest memory
+ */
+static void aes_write_block(CPUS390XState *env, const int mmu_idx,
+ const uintptr_t ra, uint64_t guest_addr,
+ uint8_t *buf)
+{
+ write_guest_wrap_u8(env, mmu_idx, ra, guest_addr, buf, AES_BLOCK_SIZE);
+}
+
+/*
+ * Helper function returning the bitsize of the address mode.
+ * Within this file only 64 bit and 32 bit are supported and
+ * thus this function returns either 64 or 32 or 0.
+ */
+static int get_address_bitsize(CPUS390XState *env)
+{
+ if (env->psw.mask & PSW_MASK_64) {
+ return 64;
+ } else if (env->psw.mask & PSW_MASK_32) {
+ return 32;
+ } else {
+ /* unknown or unsupported here */
+ return 0;
+ }
+}
+
+int cpacf_aes_ecb(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint64_t param_addr, uint64_t *dst_ptr_reg,
+ uint64_t *src_ptr_reg, uint64_t *src_len_reg,
+ uint32_t type, uint8_t fc, uint8_t mod)
+{
+ enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE };
+ uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE];
+ uint64_t len = *src_len_reg, done = 0;
+ int i, keysize, addr_reg_size;
+ uint8_t key[32];
+ AES_KEY exkey;
+
+ g_assert(type == S390_FEAT_TYPE_KM);
+ switch (fc) {
+ case CPACF_KM_AES_128:
+ keysize = 16;
+ break;
+ case CPACF_KM_AES_192:
+ keysize = 24;
+ break;
+ case CPACF_KM_AES_256:
+ keysize = 32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* check addressing mode, raise exception if not supported here */
+ addr_reg_size = get_address_bitsize(env);
+ switch (addr_reg_size) {
+ case 64:
+ break;
+ case 32:
+ len = (uint32_t)len;
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* early bail out if length is zero */
+ if (!len) {
+ return 0;
+ }
+
+ /* length has to be properly aligned. */
+ if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) {
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ /* fetch key from param block */
+ read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize);
+
+ /* expand key */
+ if (mod) {
+ AES_set_decrypt_key(key, keysize * 8, &exkey);
+ } else {
+ AES_set_encrypt_key(key, keysize * 8, &exkey);
+ }
+
+ /* process up to MAX_BLOCKS_PER_RUN aes blocks */
+ for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) {
+ aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in);
+ if (mod) {
+ AES_decrypt(in, out, &exkey);
+ } else {
+ AES_encrypt(in, out, &exkey);
+ }
+ aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out);
+ len -= AES_BLOCK_SIZE;
+ done += AES_BLOCK_SIZE;
+ }
+
+ *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size,
+ *src_ptr_reg + done);
+ *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size,
+ *dst_ptr_reg + done);
+ *src_len_reg -= done;
+
+ return !len ? 0 : 3;
+}
diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c
index 27decdda63..534498173c 100644
--- a/target/s390x/tcg/crypto_helper.c
+++ b/target/s390x/tcg/crypto_helper.c
@@ -98,6 +98,27 @@ static int cpacf_klmd(CPUS390XState *env, const int mmu_idx, const uintptr_t ra,
return rc;
}
+static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
+ uint32_t r1, uint32_t r2, uint32_t r3,
+ uint8_t fc, uint8_t mod)
+{
+ int rc = 0;
+
+ switch (fc) {
+ case CPACF_KM_AES_128:
+ case CPACF_KM_AES_192:
+ case CPACF_KM_AES_256:
+ rc = cpacf_aes_ecb(env, mmu_idx, ra, env->regs[1],
+ &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1],
+ S390_FEAT_TYPE_KM, fc, mod);
+ break;
+ default:
+ tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
+ }
+
+ return rc;
+}
+
static int cpacf_ppno(CPUS390XState *env, const int mmu_idx, uintptr_t ra,
uint32_t r1, uint32_t r2, uint32_t r3, uint8_t fc)
{
@@ -166,6 +187,9 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
case S390_FEAT_TYPE_KLMD:
rc = cpacf_klmd(env, mmu_idx, ra, r1, r2, r3, fc);
break;
+ case S390_FEAT_TYPE_KM:
+ rc = cpacf_km(env, mmu_idx, ra, r1, r2, r3, fc, mod);
+ break;
case S390_FEAT_TYPE_PPNO:
rc = cpacf_ppno(env, mmu_idx, ra, r1, r2, r3, fc);
break;
diff --git a/target/s390x/tcg/meson.build b/target/s390x/tcg/meson.build
index 8ae8da9708..6f2e75764b 100644
--- a/target/s390x/tcg/meson.build
+++ b/target/s390x/tcg/meson.build
@@ -5,6 +5,7 @@ s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
))
s390x_common_ss.add(when: 'CONFIG_TCG', if_true: files(
'cc_helper.c',
+ 'cpacf_aes.c',
'cpacf_sha256.c',
'cpacf_sha512.c',
'crypto_helper.c',