Commit 3ff83a60b5 for qemu.org

commit 3ff83a60b5fa8d8c947cda9744db8716b5b04dc3
Merge: 3a202dab30 b397997602
Author: Richard Henderson <richard.henderson@linaro.org>
Date:   Sat Oct 31 06:15:27 2026 -0500

    Merge tag 'pull-hex-20261030' of https://github.com/qualcomm/qemu into staging

    hexagon: mttcg, HLX, HMX, H2

    * h2 boot roms
    * enable MTTCG
    * Add HLX
    * Add system emulation features for HMX, no opcodes yet

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    # gpg: Signature made Fri 30 Oct 2026 08:29:20 PM CDT
    # gpg:                using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32
    # gpg: Good signature from "Brian Cain (OSS Qualcomm) <brian.cain@oss.qualcomm.com>" [unknown]
    # gpg:                 aka "Brian Cain (QUIC) <quic_bcain@quicinc.com>" [unknown]
    # gpg:                 aka "Brian Cain <bcain@kernel.org>" [unknown]
    # gpg:                 aka "Brian Cain (QuIC) <bcain@quicinc.com>" [unknown]
    # gpg:                 aka "Brian Cain (CAF) <bcain@codeaurora.org>" [unknown]
    # gpg:                 aka "bcain" [unknown]
    # gpg: WARNING: This key is not certified with a trusted signature!
    # gpg:          There is no indication that the signature belongs to the owner.
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    * tag 'pull-hex-20261030' of https://github.com/qualcomm/qemu: (40 commits)
      target/hexagon: implement mxclracc
      hw/hexagon: migrate the HMX state
      hw/hexagon: describe HMX in the device tree
      target/hexagon: gate HMX exec on SSR:XE2
      target/hexagon: import HMX instruction definitions
      target/hexagon: add per-CPU HMX configuration
      hw/hexagon: add the HMX context device
      target/hexagon: add HMX attrs, state
      tests/functional/hexagon: add HLX system-mode tests
      tests/tcg/hexagon: add HLX instruction tests
      target/hexagon: expose HLX registers through the gdbstub
      target/hexagon: add HLX multiply instructions
      target/hexagon: add HLX shift, average and lookup instructions
      target/hexagon: add HLX paired ALU instructions
      target/hexagon: add HLX common ALU instructions
      target/hexagon: decode HLX packets and add load and store
      target/hexagon: add HLX packet slot and resource checks
      target/hexagon: translate packets with HLX instructions
      target/hexagon: add HLX absdiff and sign-fill gvec operations
      target/hexagon: add HLX compare and average gvec operations
      ...

    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>