Commit 44b50658b1 for qemu.org

commit 44b50658b1b71f0a69b95408dab36473d6d9c0cb
Author: Alex Bennée <alex.bennee@linaro.org>
Date:   Thu Oct 29 17:17:37 2026 +0000

    target/i386: terminate a tcg block on gen_RDMSR

    End the block the same way that gen_WRMSR does so an IO access under
    icount. While this fixes this particular case I suspect there are more
    IO like accesses the x86 TCG front-end should take care off.

    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4779
    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Message-ID: <20261029171737.2126803-1-alex.bennee@linaro.org>
    Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index ed56edf8a3..911bce5f53 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -3783,6 +3783,7 @@ static void gen_RDMSR(DisasContext *s, X86DecodedInsn *decode)
     gen_update_cc_op(s);
     gen_update_eip_cur(s);
     gen_helper_rdmsr(tcg_env);
+    s->base.is_jmp = DISAS_EOB_NEXT;
 }
 #else
 #define gen_RDMSR gen_unreachable