Commit 5c10bdb3b4 for qemu.org
commit 5c10bdb3b4dbdcbc12b9a0886873343031f5dff4
Author: Brian Cain <brian.cain@oss.qualcomm.com>
Date: Wed Oct 7 17:37:00 2026 -0700
target/hexagon: derive HVX storage sizes from types
Use sizeof_field(MMVector, ub) for vector-payload storage and sizeof(MMQReg)
for predicate storage. This makes the intent clearer and binds to the field
instead of a max-size constant.
In particular, these bounds exclude MMVector.ext, the QFloat extended-precision
bits.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 609409e32d..a74eaa45fc 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -191,7 +191,7 @@ static void print_vreg(FILE *f, CPUHexagonState *env, int regnum,
{
if (skip_if_zero) {
bool nonzero_found = false;
- for (int i = 0; i < MAX_VEC_SIZE_BYTES; i++) {
+ for (int i = 0; i < sizeof_field(MMVector, ub); i++) {
if (hexagon_mmvec_get_byte(&hex_hvx(env)->VRegs[regnum], i) != 0) {
nonzero_found = true;
break;
@@ -205,8 +205,8 @@ static void print_vreg(FILE *f, CPUHexagonState *env, int regnum,
qemu_fprintf(f, " v%d = ( ", regnum);
qemu_fprintf(f, "0x%02x",
hexagon_mmvec_get_byte(&hex_hvx(env)->VRegs[regnum],
- MAX_VEC_SIZE_BYTES - 1));
- for (int i = MAX_VEC_SIZE_BYTES - 2; i >= 0; i--) {
+ sizeof_field(MMVector, ub) - 1));
+ for (int i = sizeof_field(MMVector, ub) - 2; i >= 0; i--) {
qemu_fprintf(f, ", 0x%02x",
hexagon_mmvec_get_byte(&hex_hvx(env)->VRegs[regnum], i));
}
@@ -223,7 +223,7 @@ static void print_qreg(FILE *f, CPUHexagonState *env, int regnum,
{
if (skip_if_zero) {
bool nonzero_found = false;
- for (int i = 0; i < MAX_VEC_SIZE_BYTES / 8; i++) {
+ for (int i = 0; i < sizeof(MMQReg); i++) {
if (hexagon_mmqreg_get_byte(&hex_hvx(env)->QRegs[regnum], i) != 0) {
nonzero_found = true;
break;
@@ -237,8 +237,8 @@ static void print_qreg(FILE *f, CPUHexagonState *env, int regnum,
qemu_fprintf(f, " q%d = ( ", regnum);
qemu_fprintf(f, "0x%02x",
hexagon_mmqreg_get_byte(&hex_hvx(env)->QRegs[regnum],
- MAX_VEC_SIZE_BYTES / 8 - 1));
- for (int i = MAX_VEC_SIZE_BYTES / 8 - 2; i >= 0; i--) {
+ sizeof(MMQReg) - 1));
+ for (int i = sizeof(MMQReg) - 2; i >= 0; i--) {
qemu_fprintf(f, ", 0x%02x",
hexagon_mmqreg_get_byte(&hex_hvx(env)->QRegs[regnum], i));
}
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 6979c153f5..188a91e882 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -103,7 +103,7 @@ typedef struct {
typedef struct {
target_ulong va;
int size;
- DECLARE_BITMAP(mask, MAX_VEC_SIZE_BYTES) QEMU_ALIGNED(16);
+ DECLARE_BITMAP(mask, sizeof_field(MMVector, ub)) QEMU_ALIGNED(16);
MMVector data QEMU_ALIGNED(16);
} VStoreLog;
diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
index 30b4d710cd..ca6d4a9836 100644
--- a/target/hexagon/gdbstub.c
+++ b/target/hexagon/gdbstub.c
@@ -183,7 +183,7 @@ static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
hex_hvx(env)->VRegs[n].uw[i] = ldl_le_p(mem_buf);
mem_buf += 4;
}
- return MAX_VEC_SIZE_BYTES;
+ return sizeof_field(MMVector, ub);
}
static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
@@ -193,7 +193,7 @@ static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
hex_hvx(env)->QRegs[n].uw[i] = ldl_le_p(mem_buf);
mem_buf += 4;
}
- return MAX_VEC_SIZE_BYTES / 8;
+ return sizeof(MMQReg);
}
int hexagon_hvx_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target/hexagon/mmvec/mmvec.h b/target/hexagon/mmvec/mmvec.h
index 662f9d1597..ed2321be92 100644
--- a/target/hexagon/mmvec/mmvec.h
+++ b/target/hexagon/mmvec/mmvec.h
@@ -89,8 +89,8 @@ static inline uint8_t hexagon_mmqreg_get_byte(const MMQReg *q, size_t index)
typedef struct {
MMVector data;
- DECLARE_BITMAP(mask, MAX_VEC_SIZE_BYTES);
- target_ulong va[MAX_VEC_SIZE_BYTES];
+ DECLARE_BITMAP(mask, sizeof_field(MMVector, ub));
+ uint32_t va[sizeof_field(MMVector, ub)];
bool op;
int op_size;
} VTCMStoreLog;