Commit 8ca8296cb1 for qemu.org

commit 8ca8296cb1f64ef89d42e7cd984c5d2675e7e81c
Author: Richard Henderson <richard.henderson@linaro.org>
Date:   Fri Aug 28 17:53:43 2026 +0000

    tcg/aarch64: Implement INDEX_op_lea

    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

diff --git a/tcg/aarch64/tcg-target-has.h b/tcg/aarch64/tcg-target-has.h
index 86672b2eab..b0868e5827 100644
--- a/tcg/aarch64/tcg-target-has.h
+++ b/tcg/aarch64/tcg-target-has.h
@@ -57,7 +57,7 @@
 #define TCG_TARGET_sextract_valid(type, ofs, len)  1
 #define TCG_TARGET_deposit_valid(type, ofs, len)   1

-#define TCG_TARGET_lea_sh_valid(type, sh)          0
-#define TCG_TARGET_lea_imm_valid(type, imm)        0
+#define TCG_TARGET_lea_sh_valid(type, sh)          ((sh) < tcg_type_bits(type))
+#define TCG_TARGET_lea_imm_valid(type, imm)        ((imm) == 0)

 #endif
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index b601b19c7f..5c186156c0 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -3081,8 +3081,15 @@ static const TCGOutOpStore outop_st = {
     .out_r = tcg_out_st,
 };

+static void tgen_lea(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1,
+                     TCGReg a2, unsigned sh, tcg_target_long imm)
+{
+    tcg_out_insn(s, addsub_realshift, ADD_LSL, type, a0, a1, a2, sh);
+}
+
 static const TCGOutOpLea outop_lea = {
-    .base.static_constraint = C_NotImplemented,
+    .base.static_constraint = C_O1_I2(r, r, r),
+    .out = tgen_lea,
 };

 static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,