Commit 9c88811b81 for qemu.org
commit 9c88811b81a935a172c5c873b2ada2d9b38a5f74
Merge: 81ce3a8773 998b6db69e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Wed Sep 30 06:25:37 2026 +0100
Merge tag 'pull-target-arm-20260929' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* whpx: arm64: check for physical address width after WHPX availability
* hw/char/stm32l4x5_usart.c: Support 16-bit writes
* hw/arm: Add GPIO to Allwinner A10 model
* hw/arm/tegra241-cmdqv: Keep VINTF page0 region alive
* hw/char/exynos4210_uart: fix fifo overflow
* arm: handle CCSIDR_EL1 as a demuxed register
* target/arm: model Cortex-M0+ privilege extension
* target/arm: Fix migration of Aarch32 Secure banked registers
* target/arm: Fix PMSAv8 shareability decode for R-profile MPU regions
* target/arm: Enable FEAT_UINJ for -cpu max-v9
* target/arm: Fix timer tick and WFxT timeouts when the offset puts the count ahead
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# gpg: Signature made Tue 29 Sep 2026 11:00:31 AM BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20260929' of https://gitlab.com/pm215/qemu: (37 commits)
target/arm: Fix WFxT timeouts when the offset puts the count ahead
target/arm: Fix next timer tick when the offset puts the count ahead
target/arm: Enable FEAT_UINJ for -cpu max-v9
target/arm: Honor PSTATE.UINJ during translation
target/arm: Split out check_il
target/arm: Add PSTATE.UINJ to tbflags
target/arm: Read and write PSTATE.UINJ
target/arm: Widen cpsr_{read, write}_for_spsr_elx to uint64_t
target/arm: Clear PSTATE.UINJ when taking exceptions
target/arm: Drop U from most PSTATE bits
target/arm: Add isar_feature_aa64_uinj
target/arm: Move ID_AA64PFR2 feature tests together
target/arm: Sort BE_DATA toward the top of rebuild_hflags_a64
target/arm: Split out rebuild_hflags_common_aprofile
target/arm: Reorg rebuild_hflags_common*
target/arm: Parenthesize tbflags arguments in TBFLAG macros
target/arm: Fix PMSAv8 shareability decode for R-profile MPU regions
target/arm: Add a debug check that all sysregs are migrated
target/arm: Don't register 64-bit TTBR0, TTBR1 for PMSA
target/arm: Don't set ARM_FEATURE_VAPA for v7 PMSA
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>