Commit f71afb409a for qemu.org
commit f71afb409a87c4ecd0f9d63a5963eb645dfab780
Merge: ab37dcc263 07a4c09e4c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: Thu Nov 5 07:24:53 2026 -0800
Merge tag 'pull-loongarch-20261105' of https://github.com/bibo-mao/qemu into staging
loongarch queue
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# gpg: Signature made Wed 04 Nov 2026 10:50:52 PM PST
# gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C
# Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1
* tag 'pull-loongarch-20261105' of https://github.com/bibo-mao/qemu:
target/loongarch: Clear PAGE_READ when PTE.NR is set
target/loongarch: Support unaligned access for atomic instructions
target/loongarch: Change asrtle_d()/asrtgt_d() for signed integer comparison
target/loongarch: Add asrtle_du()/asrtgt_du() helpers
target/loongarch: Check CPU msgint feature with cpu_has_msgint()
target/loongarch: Replace kvm_cpu_has_msgint() with cpu_has_msgint()
target/loongarch: Fix memory access address with fldle
target/loongarch: Replace sys_state with vm_level
tests/data/acpi/loongarch64: Update expected DSDT.*
hw/loongarch/virt: Fix UART clock frequency in FDT
hw/loongarch/virt-acpi-build: Drop UART _CCA declaration
hw/loongarch/virt-acpi-build: Drop invalid _DSD UART clock property
bios-tables-test-allowed-diff.h: Allow LoongArch DSDT.*
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>