Commit f9ca6b19ac for qemu.org

commit f9ca6b19acb1b935e7abc920410c993b059a8b4d
Author: Dominic P <gcc@gcc.dp11.uk>
Date:   Wed Sep 30 19:51:23 2026 +0100

    tests/tcg: Add tests for sign extension after rotate

    Cover the rotr_i32 (ARM ror) and rotl_i32 (i386 roll) forms fixed by
    the previous patch.  Both tests fail without it.

    Signed-off-by: Dominic P <gcc@gcc.dp11.uk>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Message-ID: <20260930185124.3036980-3-gcc@gcc.dp11.uk>

diff --git a/tests/tcg/arm/meson.build b/tests/tcg/arm/meson.build
index 8f70411dfd..fd82b5c7a6 100644
--- a/tests/tcg/arm/meson.build
+++ b/tests/tcg/arm/meson.build
@@ -39,6 +39,7 @@ tests += {
   },
   'pcalign-a32.c': {'cflags': ['-marm']},
   'issue4448.c': {},
+  'test-arm-opt-ror.c': {'cflags': ['-marm']},
 }

 # Vector SHA1
diff --git a/tests/tcg/arm/test-arm-opt-ror.c b/tests/tcg/arm/test-arm-opt-ror.c
new file mode 100644
index 0000000000..2579168a13
--- /dev/null
+++ b/tests/tcg/arm/test-arm-opt-ror.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Regression test for tcg optimize vs sign bit repetitions after rotate. */
+
+#include <assert.h>
+
+int main(void)
+{
+    /* Load from memory so that TCG does not see a constant. */
+    volatile int v = 3;
+    int x = v, gt;
+
+    asm("sxtb %1, %1\n\t"
+        "ror %1, %1, #1\n\t"
+        "sxtb %1, %1\n\t"
+        "cmp %1, #0\n\t"
+        "movle %0, #0\n\t"
+        "movgt %0, #1"
+        : "=r"(gt), "+r"(x) : : "cc");
+    assert(gt);
+    return 0;
+}
diff --git a/tests/tcg/i386/meson.build b/tests/tcg/i386/meson.build
index 38723d7f8d..84bd68067a 100644
--- a/tests/tcg/i386/meson.build
+++ b/tests/tcg/i386/meson.build
@@ -28,6 +28,7 @@ tests += {
   'test-i386-fxtract.c': {},
   'test-i386-fyl2x.c': {},
   'test-i386-fyl2xp1.c': {},
+  'test-i386-opt-rol.c': {},
   'test-i386-opt-shr.c': {},
   'test-i386-pcmpistri.c': {'cflags': ['-msse4.2']},
   'test-i386-pseudo-denormal.c': {},
diff --git a/tests/tcg/i386/test-i386-opt-rol.c b/tests/tcg/i386/test-i386-opt-rol.c
new file mode 100644
index 0000000000..e0393147e1
--- /dev/null
+++ b/tests/tcg/i386/test-i386-opt-rol.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Regression test for tcg optimize vs sign bit repetitions after rotate. */
+
+#include <assert.h>
+
+int main(void)
+{
+    /* Load from memory so that TCG does not see a constant. */
+    volatile int v = 3;
+    int x = v;
+    char test;
+
+    asm("movsbl %b1, %1\n\t"
+        "roll $31, %1\n\t"
+        "movsbl %b1, %1\n\t"
+        "testl %1, %1\n\t"
+        "setg %0"
+        : "=q"(test), "+q"(x));
+    assert(test);
+    return 0;
+}